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Oldland CPU

Synthesizeable, 32-bit RISC CPU, SoC with toolchain

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On reset, the Oldland CPU begins fetching from the on-chip bootrom at 0x10000000. This bootrom uses CS0 on the SPI master to load a second stage bootloader from an SD card. The process is roughly:

This second stage bootloader would typically be something like u-boot and could then chain load an operating system such as RTEMS or Linux.